作者: Chang Hua Siau , Darrell Rinerson , Christrophe J. Chevallier
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摘要: A two-terminal memory array includes a plurality of first and second conductive traces. An address unit operatively applies select voltage across selected pair the traces non-select potential to unselected total current flowing in trace leakage through are sensed by sense one cycle or two pre-read operation. The currents can be combined with reference signal derive data indicative conductivity profiles that represent stored data. resistive state element is electrically series