The synthesis of robust polynomial arithmetic with stochastic logic

摘要: As integrated circuit technology plumbs ever greater depths in the scaling of feature sizes, maintaining paradigm deterministic Boolean computation is increasingly challenging. Indeed, mounting concerns over noise and uncertainty signal values motivate a new approach: design stochastic logic, that to say, digital circuitry processes signals probabilistically, so can cope with errors uncertainty. In this paper, we present general methodology for synthesizing logic polynomial arithmetic functions, category important applications such as processing. The method based on converting polynomials into particular mathematical form --- Bernstein then implementing logic. resulting serial or parallel streams are random at bit level. aggregate, becomes accurate, since results depend only precision statistics. Experiments show our produces circuits highly tolerant input stream, while area-delay product comparable implementations.