Design of power-optimal buffers tunable to process variability
作者： Constantine Caramanis , Michael Orshansky , Mario Lok , Ku He , Murari Mani
DOI: 10.1109/DCAS.2010.5955033
关键词:
摘要: In many digital designs, multi-stage tapered buffers are needed to drive large capacitive loads. These contribute a significant percentage of overall power. this paper, we propose two novel tunable buffer designs that enable power reduction in the presence process variation. A strategy derive optimal size and tuning rule post-silicon phase is developed. By comparing several circuit topologies, also demonstrate tradeoffs topology selection as function switching activity, timing requirements, magnitude Using combination HSPICE simulations our optimization algorithm, show up 30% average can be achieved with proposed structures.
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