作者: Fanny Spagnolo , Stefania Perri , Pasquale Corsonello
DOI: 10.3390/S19143055
关键词:
摘要: Connected Component Analysis (CCA) plays an important role in several image analysis and pattern recognition algorithms. Being one of the most time-consuming tasks such applications, specific hardware accelerator for CCA are highly desirable. As its main characteristic, design must be able to complete a run-time process input frame without suspending streaming data-flow, by using reasonable amount resources. This paper presents new approach that allows virtually any feature interest extracted single-pass from frames. The proposed method has been validated proper system implemented heterogeneous design, within Xilinx Zynq-7000 Field Programmable Gate Array (FPGA) System on Chip (SoC) device. For processing 640 × 480 resolution, only 760 LUTs 787 FFs were required. Moreover, frame-rate ~325 fps throughput 95.37 Mp/s achieved. When compared recent competitors, exhibits favorable performance-resources trade-off.