Integrated circuit device, semiconductor memory, and integrated circuit system coping with high-frequency clock signal

作者: Yoshinori Okajima

DOI:

关键词:

摘要: An input buffer circuit includes a first amplifier causing change in an output signal by detecting rising edge of signal, second the falling and feedback path feeding back as to amplifier. The controls such that timing only depends on amplifier,

参考文章(7)
Andrew S. Olesin, Michael D. Smith, Roger A. Whatley, Input buffer circuit for receiving multiple level input voltages ,(1984)
Atsushi c o Oki Electric Ind.Co. Ltd. Takasugi, Serial access memory ,(1992)
Gene A. Frantz, Jean-Pierre Dolait, John V. Moravec, Masashi Hashimoto, Synchronous DRAM responsive to first and second clock signals ,(1994)
Jack L. Minney, James A. Komarek, Scott B. Tanner, Keiji Fukumura, Clarence W. Padgett, Shin-ichi Kojima, Motohiro Oishi, H. Nakanishi, Output driver control for ROM and RAM devices ,(1995)
Hans Magnusson, Liem T. Nguyen, Input buffer with noise filter ,(1991)
Saito Kazunari, Yoshimatsu Takanori, SEMICONDUCTOR MEMORY DEVICE ,(1998)