作者: C.-T. Chiu , K.J. Ray Liu
DOI: 10.1109/76.134369
关键词:
摘要: The authors propose a fully pipelined architecture to compute the 2D discrete cosine transform (DCT) from frame-recursive point of view. Based on this approach, two real-time parallel lattice structures for successive frame and block DCT are developed. These with throughput rate N clock cycles an N*N input data frame. Moreover, resulting architectures modular, regular, locally connected require only 1D blocks that extended directly structure without transposition. It is therefore suitable VLSI implementation high-speed HDTV systems. A scanning pattern systems achieve higher performance proposed. using distributed arithmetic increase computational efficiency reduce round-off error discussed. >