作者: Z. Mei , M. Ahmad , M. Hu , G. Ramakrishna
DOI: 10.1109/ECTC.2005.1441298
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摘要: Previous studies, especially papers by T-C. Chiu, K. Zeng, R. Stierman and D. Edwards, Ano (2004) M. Date, T. Shoji, Fujiyoshi, Sato, K.N. Tu ECTC conference, demonstrate extensive Kirkendall voids at the interface of solder joint to Cu substrate, their significant effects on impact shock strength joints. This study focuses two issues, condition for void formation, effect reliability. Samples electronic assemblies different packages aged or thermal cycled were cross-sectioned either FEB sputtering etching. The results show that Cu/solder formed extensively in some cases, but not so much others. So far, we are clear exactly what factors control formation; it seems plating process small concentration Ni substrate influences density distribution. Shock 400G BGA 20 days 125/spl deg/C did degrade; failure occurred delamination fiber/resin underneath non-solder mask defined pads, inside where close pads. We also curve-fitted Chiu's result growth vs time temperatures with equation A = Ct /sup 05/ exp (-Q/RT), use prediction voided area product service condition.