Apparatus and method for sampling rate conversion with rational factors
作者： Vladimir Koifman , Eliezer Sand , Michael Zarubinsky
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摘要: A rational decimation circuit (200) has an integration filter (210) and FIR-filter (220). The N serially arranged integrator blocks (230-n) interpolator block (250). (220) K channels (260-k) a commutator (290) which are controlled by control (300). Each channel multiplier unit (270-k) accumulator (280-k). transfer function with N-fold poles the zeros cancel poles. FIR-coefficients hk (TV) in related to FV /FX ratio of (250) number (230-n). method is also described.
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