Floating gate MOSFET based Operational Transconductance Amplifier and study of mismatch
作者： V. Suresh Babu , Ambika Sekhar , Devi R. Salini , M. R. Baiju
DOI: 10.1109/ICIEA.2009.5138183
关键词:
摘要: This paper presents an Operational Transconductance Amplifier realized using Floating Gate MOSFETs only. can be used as Neuron Activation Function with wide linear range and adaptable threshold level slope. circuit is suitable for analog signal processing neural network applications. generates log sigmoid tan NAF functions simultaneously. In this the parameters of function easily changed by changing voltage at control gate FGMOSFET. The proposed FGMOSFET based OTA large equal to 2V a power supply +0.75V. Power analysis noise performed. Mismatch study performed Monte Carlo simulation. TSPICE simulation results 2µm N-well process are presented. Layout design done L-Edit in Tanner Tool.
sci-hub.se 参考文章(12)
Esther. Rodriguez-Villegas, Low power and low voltage circuit design with the FGMOS transistor ,(2006)
U. Grunebaum, J. Oehm, K. Schumacher, Mismatch modelling for large area MOS devices european solid-state circuits conference. pp. 268- 271 ,(1997)
E. Sánchez-Sinencio, J. Silva-Martínez, CMOS transconductance amplifiers, architectures and active filters: a tutorial IEE Proceedings - Circuits, Devices and Systems. ,vol. 147, pp. 3- 12 ,(2000) , 10.1049/IP-CDS:20000055
G. Bogason, Generation of a neuron transfer function and its derivatives Electronics Letters. ,vol. 29, pp. 1867- 1869 ,(1993) , 10.1049/EL:19931243
Chun Lu, Bingxue Shi, Circuit design of an adjustable neuron activation function and its derivative Electronics Letters. ,vol. 36, pp. 553- 555 ,(2000) , 10.1049/EL:20000401
Y. Berg, O. Naess, M. Hovin, Ultra low-voltage floating-gate transconductance amplifier with tunable gain and linearity international symposium on circuits and systems. ,vol. 3, pp. 343- 346 ,(2000) , 10.1109/ISCAS.2000.856067
K.G. Lamb, S.J. Sanchez, W.T. Holman, A low noise operational amplifier design using subthreshold operation midwest symposium on circuits and systems. ,vol. 1, pp. 35- 38 ,(1997) , 10.1109/MWSCAS.1997.666027
J. Ramirez-Angulo, S.C. Choi, G. Gonzalez-Altamiran, Low supply voltage OTA architectures using floating gate transistors midwest symposium on circuits and systems. ,vol. 1, pp. 158- 161 ,(1995) , 10.1109/MWSCAS.1995.504402
S.Y. Foo, L.R. Anderson, Y. Takefuji, Analog components for the VLSI of neural networks IEEE Circuits & Devices. ,vol. 6, pp. 18- 26 ,(1990) , 10.1109/101.59426
T. Shima, T. Kimura, Y. Kamatani, T. Itakura, Y. Fujita, T. Iida, Neuro chips with on-chip back-propagation and/or Hebbian learning IEEE Journal of Solid-state Circuits. ,vol. 27, pp. 1868- 1876 ,(1992) , 10.1109/4.173117