Nonlinearity robust successive requantizer
作者： Ian Galton , Ashok Swaminathan
DOI:
关键词:
摘要: An embodiment of the invention is a successive requantizer, which serves as replacement for ΔΣ modulator in fractional-N PLL or DAC, and avoids above-mentioned spurious tone problem, thereby circumventing tradeoffs that result from reliance on common approach making highly linear analog circuitry to avoid tones. A requantizer has potential reduce power consumption cost commercial communication devices. performs digital quantization one bit at time such way noise can be engineered have desirable properties non-linearity robustness. The applicable most high-performance systems, cellular telephone handsets wireless local metropolitan area network transceivers.
lens.org 参考文章(31)
B. De Muer, M.S.J. Steyaert, A CMOS monolithic /spl Delta//spl Sigma/-controlled fractional-N frequency synthesizer for DCS-1800 IEEE Journal of Solid-state Circuits. ,vol. 37, pp. 835- 844 ,(2002) , 10.1109/JSSC.2002.1015680
S.E. Meninger, M.H. Perrott, A 1-MHZ Bandwidth 3.6-GHz 0.18-<tex>$muhbox m$</tex>CMOS Fractional-N Synthesizer Utilizing a Hybrid PFD/DAC Structure for Reduced Broadband Phase Noise IEEE Journal of Solid-State Circuits. ,vol. 41, pp. 966- 980 ,(2006) , 10.1109/JSSC.2006.870894
Ingrid Daubechies, Ronald DeVore, Approximating a bandlimited function using very coarsely quantized data: A family of stable sigma-delta modulators of arbitrary order Annals of Mathematics. ,vol. 158, pp. 679- 710 ,(2003) , 10.4007/ANNALS.2003.158.679
W. Chou, R.M. Gray, Dithering and its effects on sigma-delta and multistage sigma-delta modulation IEEE Transactions on Information Theory. ,vol. 37, pp. 500- 513 ,(1991) , 10.1109/18.79906
E. Temporiti, G. Albasini, I. Bietti, R. Castello, M. Colombo, A 700-kHz bandwidth /spl Sigma//spl Delta/ fractional synthesizer with spurs compensation and linearization techniques for WCDMA applications IEEE Journal of Solid-state Circuits. ,vol. 39, pp. 1446- 1454 ,(2004) , 10.1109/JSSC.2004.831598
Codes for zero spectral density at zero frequency (Corresp.) IEEE Transactions on Information Theory. ,vol. 30, pp. 435- 439 ,(1984) , 10.1109/TIT.1984.1056858
A.J. Magrath, M.B. Sandler, Efficient dithering of sigma-delta modulators with adaptive bit flipping Electronics Letters. ,vol. 31, pp. 846- 847 ,(1995) , 10.1049/EL:19950587
Sudhakar Pamarti, Jared Welz, Ian Galton, Statistics of the Quantization Noise in 1-Bit Dithered Single-Quantizer Digital Delta–Sigma Modulators IEEE Transactions on Circuits and Systems. ,vol. 54, pp. 492- 503 ,(2007) , 10.1109/TCSI.2006.887616
S. Pamarti, L. Jansson, I. Galton, A wideband 2.4-GHz delta-sigma fractional-NPLL with 1-Mb/s in-loop modulation IEEE Journal of Solid-state Circuits. ,vol. 39, pp. 49- 62 ,(2004) , 10.1109/JSSC.2003.820858
J. Welz, I. Galton, E. Fogleman, Simplified logic for first-order and second-order mismatch-shaping digital-to-analog converters IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing. ,vol. 48, pp. 1014- 1027 ,(2001) , 10.1109/82.982352