Applying different body bias to different substrate portions for non-volatile storage

作者: Deepak Chandra Sekar , Nima Mokhlesi

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摘要: Body bias can be applied to optimize performance in a non-volatile storage system. set an adaptive manner reduce error count of correcting and/or detecting code when reading data from elements. Also, body level increased or decreased as number programming cycles increases. levels and separately for chip, plane, block page. A first NAND strings which operations are being performed by controlling voltage provided source side the second p-well. not is floated receives fixed voltage.

参考文章(65)
Deepak Chandra Sekar, Nima Mokhlesi, Non-volatile storage with bias based on selective word line ,(2006)
Siva G. Narendra, Shekhar Y. Borkar, Ali Keshavarzi, Vivek K. De, Transistor group mismatch detection and reduction ,(1998)
Sumio Tanaka, Yoshihisa Iwata, Yasuo Ito, 寿実夫 田中, 佳久 岩田, 寧夫 伊藤, Semiconductor integrated circuit device and method for verify erasing nonvolatile semiconductor memory ,(1998)
毅 大岸, Takeshi Ogishi, Non-volatile semiconductor storage device ,(1997)
Okamoto Mitsuhiro, SEMICONDUCTOR MEMORY DEVICE ,(2004)
Ken Takeuchi, Tomoharu Tanaka, Semiconductor device and memory system ,(1997)
DH Kang, JS Kim, YR Kim, YT Kim, MK Lee, YJ Jun, JH Park, F Yeung, CW Jeong, J Yu, JH Kong, DW Ha, SA Song, J Park, YH Park, YJ Song, CY Eum, KC Ryoo, JM Shin, DW Lim, SS Park, JH Kim, WI Park, KR Sim, JH Cheong, JH Oh, JI Kim, YT Oh, KW Lee, SP Koh, SH Eun, NB Kim, GH Koh, GT Jeong, HS Jeong, Kinam Kim, None, Novel Heat Dissipating Cell Scheme for Improving a Reset Distribution in a 512M Phase-change Random Access Memory (PRAM) symposium on vlsi technology. pp. 96- 97 ,(2007) , 10.1109/VLSIT.2007.4339741