Multiple-hierarchical-level multiprocessor system
作者： Bruno Conterno , Vildo Luperini , Fernando Pesce , Giuseppe Barbagelata , Osvaldo Pugliese
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摘要: A multiple-hierarchical-level multiprocessor system having first numbers of processing modules comprising, each, at least one processor and connected to a group common direct-access communication lines for forming hierarchical level (family); module each the aforementioned also being second (region); number groups interconnected via data transmitting receiving means third hierarcical (region network); comprising enabling operation independent modules.
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