Cathedral-II: A Silicon Compiler for Digital Signal Processing
作者： H. De Man , J. Rabaey , P. Six , L. Claesen
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摘要: The article describes the status of work at IMEC on Cathedral-II silicon compiler. compiler was developed to synthesize synchronous multiprocessor system chips for digital signal processing. It is a continuation Cathedral-I operational bit-serial filters. based ?meet in middle? design method that encourages total separation between and reusable design. CAD includes rule-based synthesis program, procedural controller environment. Processors are synthesized terms modules called from automated module generators. Chip layout done floor planner. An expert subsystem verifies correctness during generates functional timing models verification chip levels.
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sci-hub.se 参考文章(5)
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