Implementation of large neural associative memories by massively parallel array processors
作者： A. Strey
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摘要: The authors discuss the use of massively parallel array processors for simulating large neural associative memories. Although based on standard matrix operations simulation memories requires special algorithms because a sparse coding input and output information is needed. Four different implementations with mapping strategies processor topologies are presented illustrated by example. theoretical performance all compared architecture PAN IV, designed efficient shortly described. >
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