Primitives to enhance thread-level speculation

作者: Xiang Zou , Shivnandan D. Kaushik , Bryant E. Bigbee , Hong Wang , Quinn A. Jacobson

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摘要: A processor may include an address monitor table and atomic update to support speculative threading. The also one or more registers maintain state associated with execution of threads. the following primitives: instruction write a register state, trigger committing buffered memory updates, read status and/or clear bits trap/exception/interrupt handling. Other embodiments are described claimed.

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