Methods of Forming Dual-Damascene Metal Wiring Patterns for Integrated Circuit Devices and Wiring Patterns Formed Thereby

作者: Boung Ju Lee , Heon Jong Shin , Hee Sung Kang

DOI:

关键词:

摘要: Methods of forming dual-damascene metal wiring patterns include a first pattern (e.g., copper pattern) on an integrated circuit substrate and etch-stop layer the pattern. These steps are followed by electrically insulating inter-metal dielectric layer. The selectively etched in sequence to define opening therein that exposes portion This may trench via hole extending downward from bottom trench. A barrier is formed sidewall directly removed then for sufficient duration expose second order complete structure.

参考文章(12)
Qiang-Tang Jiang, Kenneth D. Brennan, Method for sealing via sidewalls in porous low-k dielectric layers ,(2002)
Dawn M. Hopper, Minh Van Ngo, Interconnects with improved barrier layer adhesion ,(2002)
Syun-Ming Jang, Shwang-Ming Jeng, Jun-Lung Huang, Jeng-Cheng Liu, Lain-Jong Li, Tien-I Bao, Composite etching stop in semiconductor process integration ,(2004)
Christophe Marcadal, Jenny C. Lin, Mei Chang, Paul Frederick Smith, Ming Xi, Michael X. Yang, Ling Chen, Fusen Chen, Reliability barrier integration for Cu application ,(2002)
Christophe Marcadal, Seshadri Ganguli, Ling Chen, Wei Cao, Tantalum barrier layer for copper metallization ,(2003)
Chen-Hua Yu, Shau-Lin Shue, Ming-Hsing Tsai, Jing-Cheng Lin, Method to solve via poisoning for porous low-k dielectric ,(2001)