作者: Chih-Chao Yang , Baozhen Li , Fen Chen
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摘要: The present invention provides a 3D via capacitor and method for forming the same. includes an insulating layer on substrate. has having sidewalls bottom. A first electrode overlies at least portion of bottom via. high-k dielectric material electrode. conductive plate is over layer. second leaves remaining unfilled. formed in substantially parallel to not contact with electrodes. An array such capacitors also provided.