作者: Higashitani Keiichi , Ohno Takio , Kimura Masatoshi
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摘要: A semiconductor device having a multi-level interconnection structure is disclosed which includes metal interconnect wire (2) formed on surface of an interlayer dielectric film (7) serving as base; high-stress TEOS oxide (5), SOG (3), and low-stress (6) are deposited films; contact hole (4), thereby decreasing stresses applied from the films to prevent hillocks in hole.