Multi-processor system with fault detection

作者: Hideo Oyamada , Minoru Shiga

DOI:

关键词:

摘要: A bus coupling type multi-processor system is disclosed having multiple processor modules and a fault detection system. module includes first processor, second monitor including timer for measuring elapsed time, register storing flag indicating the operation of its own detector detecting either in or another module. starting circuit starts one clock period later than processor. comparator compares output from with to detect fault. set by reset signal When not module, detects this judges that has occurred within predetermined

参考文章(9)
Masahiro Shouda, Yasuyuki Oguma, Yoshifumi Imazu, In-circuit emulator ,(1988)
Ezzat A. Dabbish, Larry C. Puhl, Carl M. Danielsen, Redundant microprocessor control system using locks and keys ,(1989)
Stanley K. Chao, The system organization of MOBIDIC B Papers presented at the December 1-3, 1959, eastern joint IRE-AIEE-ACM computer conference on - IRE-AIEE-ACM '59 (Eastern). pp. 101- 107 ,(1959) , 10.1145/1460299.1460310
Yukio C, Yukari C, Shigetatsu C, Serial data transfer system ,(1987)
Wallace B. Harwood, Dennis K. Verbeek, Mark W. McDermott, Data processor test architecture ,(1990)
Neil A Katin, Richard D Mcmurray, William W Kolb, Computer processor controller. ,(1984)