An investigation of reliability and variability issues in nanoscale SOI and multi-gate MOSFETs: modelling, simulation and characterization

摘要: This work encapsulates research being carried out in the Device and Wafer Level Characterization Lab at Department of Electrical Engineering, IIT Delhi field nano-electronics device characterization modeling. Performance different multi-gate architectures, as well their reliability variability working conditions is investigated using measurement simulations. The 180-nm fully partially-depleted SOI MOSFETs has been extensively studied against heavy-ion irradiation for outer space applications. Exposure to heavy ion radiation can result single event effects semiconductor-based devices circuits. Therefore, transient response presented 6T-SRAM cell. Moreover, self-heating (SH) an undesirable phenomenon highly scaled sub-10 nm it also a major concern. heat accumulation due SH explored comparison among nanowire FET, FinFET, iFinFET presented. Our results show that performance will be affected analog digital applications irradiations. Process obstacle design its proper consideration important circuit designs. we have extracted SPICE based compact model FETs from measured data. We then run Monte-Carlo simulations incorporate process variations on nanowire-MOSFETs.