Thermal Ground Plane for Chip-Level Electronics Cooling

摘要: The three-dimensional thermal ground plane was developed in response to the needs of high-power density electronics applications which heat must be removed as close chip surface possible. novel design for this planar cooling device proposed with three key innovations evaporator, wick, and reservoir layer, provided enhanced reliable performance without wick dryout back flows. For evaporator a combination tapered channel triple-spike microstructure designed break up pinned meniscus at end vapor liquid channels. overall had spikes where main separated by middle spike then continued flow between walls side spikes. nanowire-integrated microporous silicon membrane overcome driving coolant out channels spreading on top assistance extended capillary action. This innovative used nanowires extend enhance force, especially pores unable overflow pores. chronic problem micro devices could solved these designs. To analyze thermal-fluid system, fluid dynamic phase-change models were calculate thermodynamic fluidic properties, such operating temperature, pressure, vapor-liquid interface radius curvature, rate bubble formation. microscale conduction theory derived from traditional Fourier's law classical size effect effective medium conductivities porous cross-plane direction, respectively. theoretical results showed good agreement experimental measured 3u technique, demonstrating reduction conductivity bulk silicon. Cooling demonstrated experimentally ceramic heater, thermocouple modules, microfabrication techniques, including photoelectrochemical etching create silicon, deep reactive-ion form thin membrane, hydrothermal synthesis grow membrane. study shows feasibility reliable, continuous, high-performance using forces address increasing requirements management chip-level electronics.