Message packet logging in a distributed simulation system

作者: James P. Freyensee , Steven A. Sivier , Carl B. Frankel , Carl Cavanagh

DOI:

关键词:

摘要: A distributed simulation system may include a plurality of nodes arranged to perform under test. The are configured communicate commands and signal values for the test using message packets transmitted between nodes. At least one is log in or more files during simulation.

参考文章(53)
Glenn A. Dearth, Paul M. Whittemore, Virtual bus for distributed hardware simulation ,(1996)
Jouko Juhani Kapanen, Master-slave synchronization ,(1999)
Ieee Standards Board, IEEE Standard hardware Description language : based on the Verilog hardware description language The Institute of Electrical and Electronics Engineers. ,(1996)
Ana Kapetanakis, David Hinds, Mark C. Campbell, David S. Levin, Stephen J. McFarland, David J. Miller, Object oriented framework for testing software ,(1996)
Swapnajit Mittra, Principles of Verilog PLI ,(2011)
Nimish S. Radia, Joseph F. Skovira, Philip L. Childs, Common breakpoint in virtual time logic simulation for parallel processors ,(1992)