Method of controlling a self-test in a data processing system and data processing system suitable for this method

作者: Robertus Wilhelmus Cornelis Dekker

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摘要: A method is described, in which a self-test controlled subsystem of data processing system. Control patterns are transported by the system via shift register and then passed to connections used for normal control non-testing condition. characterization test result loaded again into also intended use subsequently suitable according this controllable condition from without it being necessary that provided with special connections.

参考文章(10)
Algirdas A Avizienis, Self-testing and repairing computer ,(1967)
Philip W. Bullinger, John W. Stewart, II Thomas L. Langford, Bus executed scan testing method and apparatus ,(1989)
J. Turino, IEEE P1149 Proposed Standard Testability Bus-An update with case histories Proceedings 1988 IEEE International Conference on Computer Design: VLSI. pp. 334- 337 ,(1988) , 10.1109/ICCD.1988.25717
R.P. van Riessen, H.G. Kerkhoff, A. Kloppenburg, Designing and implementing an architecture with boundary scan IEEE Design & Test of Computers. ,vol. 7, pp. 9- 19 ,(1990) , 10.1109/54.46889
Johnny J. LeBlanc, LOCST: A Built-In Self-Test Technique IEEE Design & Test of Computers. ,vol. 1, pp. 45- 52 ,(1984) , 10.1109/MDT.1984.5005689
Jin-Ki Kim, Hyung-Kyu Yim, Jae-Young Do, Jung-Dal Choi, Programmable sequential-code recognition circuit ,(1989)
Philip W. Bullinger, II Thomas L. Langford, Method and apparatus for bus executed boundary scanning ,(1989)
Katsuhiro Shimohigashi, Jun Etoh, Kazuyuki Miyazawa, Katsutaka Kimura, Method of testing memory cells in an address multiplexed dynamic ram including test mode selection ,(1991)
Hans Ontrop, Cormac O'Connell, Betty Prince, Peter H. Voss, Roelof Salters, Cathal G. Phelan, Thomas J. Davies, Leonardus C. M. G. Pfennings, Static memory unit having a plurality of test modes, and computer equipped with such units ,(1988)