Heterogeneous Architecture Exploration: Analysis vs. Parameter Sweep

摘要: This paper argues the case for use of analytical models in FPGA architecture layout exploration. We show that problem when simplified, is amenable to formal optimization techniques such as integer linear programming. However, simplification process may lead inaccurate models. To test overall methodology, we combine resulting layouts with VPR 5.0. Our results architectures are better than those found using traditional parameter sweeping techniques.