Fly-by support module for a peripheral bus
作者： Cesar A. Talledo , Jeffrey Lukanc , Jiann Liao
DOI:
关键词:
摘要: A system is provided that includes a bus master, slave and fly-by interface, all coupled to peripheral bus. device the interface. The master configured control transfer of data between without buffering data. interface isolate from during device. In addiction, provide set signals on bus, wherein regulate flow Fly-by transfers can be fully synchronous, burst operation at rate one value per clock cycle supported.
google.de 参考文章(5)
Patrick Le Quere, Controller for multiple data transfer between a plurality of memories and a computer bus ,(1996)
Michael J. Bowes, Brian A. Childers, Dual bus concurrent multi-channel direct memory access controller and method ,(1996)
Shawn D. Bayle, Structure for enabling direct memory-to-memory transfer with a fly-by DMA unit ,(1993)
Vineet Dujari, Fly-by data transfer system ,(1988)
Dennis Charles Wilkerson, Edward Hammond Green, Mark Michael Schaffer, Richard Gerard Hofmann, David Otero, Jeffrey Todd Bridges, Processor local bus posted DMA FlyBy burst transfers ,(1997)