Low-temperature electrical characterization of junctionless transistors
作者： Dae-Young Jeon , So Jeong Park , Mireille Mouis , Sylvain Barraud , Gyu-Tae Kim
DOI: 10.1016/J.SSE.2012.10.018
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摘要: Abstract The electrical performance of junctionless transistors (JLTs) with planar structures was investigated under low-temperature and compared to that the traditional inversion-mode (IM) transistors. low-field mobility ( μ 0 ) JLT devices found be limited by phonon neutral defects scattering mechanisms for long gate lengths, whereas charged mostly dominated short likely due induced source/drain (S/D) implantation added in process. Moreover, temperature dependence flat-band voltage V fb ), threshold th subthreshold swing S also discussed.
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