作者: Sylvain Guilley , Laurent Sauvage , Jean-Luc Danger , Nidhal Selmane , Renaud Pacalet
DOI: 10.1109/FDTC.2008.18
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摘要: This article presents a family of cryptographic ASICs, called SecMat, designed in CMOS 130 nanometer technology by the authors with help STMicroelectronics.The purpose these prototype circuits is to experience published ``implementation-level'' attacks(SPA, DPA, EMA, templates, DFA). We report our conclusions about practicability attacks:which ones are most simple mount, and which require more skill, time, equipments, etc.The potential FPGAs as security evaluation commodities at design time also detailed.Then, we discuss ``dual counter-measures'', that meant resist both passive active attacks.This study started four years ago TIMA (Grenoble), framework project MARS. highlight some research directions towards dependable cost-effective dual counter-measures.