Chip-last embedded interconnect structures and methods of making the same

摘要: CHIP-LAST EMBEDDED INTERCONNECT STRUCTURES AND METHODS OF MAKING THE SAME ABSTRACT The various embodiments of the present invention provide a novel chip-last embedded structure, wherein an IC is within one to two metal layer substrate. are comparable other two-dimensional and three-dimensional WLFO packages prior art as have similar package thicknesses X-Y form factors, short interconnect lengths, fine-pitch interconnects chip I/Os, reduced count for re-distribution I/O pads ball grid arrays (BGA) or land (LGA), improved thermal management options.