Microprocessor system with flexible instruction controlled by prior instruction
作者： Mark E. Miller , Kenneth E. Garey
DOI:
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摘要: A data processing apparatus having a pipeline computer architecture with an input latch is disclosed. The includes ALU that executes plurality of instructions. At least some the instructions have immediate format including field for intermediate and specifying destination output. uses two operands performing at format. conditionally accepts either contents or output previous instruction as second operand to depending on specified in instruction.
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