Strained LDMOS and demos
作者： Sameer Pendharkar , Marie Denison , Seetharaman Sridhar , Umamaheswari Aghoram
DOI:
关键词:
摘要: An integrated circuit on a (100) substrate containing an n-channel extended drain MOS transistor with drift region current flow oriented in the direction stressor RESURF trenches region. The have elements more than 100 MPa compressive stress. p-channel tensile
lens.org 参考文章(20)
Henry Kuo-Shun Chen, Akira Ito, Semiconductor Device with Increased Breakdown Voltage ,(2010)
Brian A. Winstead, Mark D. Hall, Michael D. Turner, Konstantin V. Loiko, Rode R. Mora, Toni D. Van Gompel, Shallow trench isolation for soi structures combining sidewall spacer and bottom liner ,(2007)
Christopher Boguslaw Kocon, Lateral power diode with self-biasing electrode ,(2008)
Christopher Boguslaw Kocon, Lateral power transistor with self-biasing electrodes ,(2006)
Leonard Forbes, Arup Bhattacharyya, Devices and methods to improve carrier mobility ,(2006)
Verma Purakh, Guowei Zhang, Yisuo Li, Sanford Chu, High performance ldmos device having enhanced dielectric strain layer ,(2008)
Jing Wang, Huilong Zhu, Stress-generating shallow trench isolation structure having dual composition ,(2007)
Sujit Banerjee, Vijay Parthasarathy, Method of fabricating a deep trench insulated gate bipolar transistor ,(2009)
Marius K. Orlowski, Bich-Yen Nguyen, Semiconductor process with first transistor types oriented in a first plane and second transistor types oriented in a second plane ,(2004)