作者: Henry Kuo-Shun Chen , Akira Ito
DOI:
关键词: Electrical engineering 、 Field-effect transistor 、 MOSFET 、 Breakdown voltage 、 Silicon 、 Time-dependent gate oxide breakdown 、 CMOS 、 Optoelectronics 、 Semiconductor device 、 Materials science 、 Gate oxide
摘要: Optimization of the implantation structure a metal oxide silicon field effect transistor (MOSFET) device fabricated using conventional complementary (CMOS) logic foundry technology to increase breakdown voltage. The techniques used optimize involve lightly implanting gate region, displacing drain region from and P-well N-well regions adjacent one another without an isolation in between.