Cache Hierarchy and Memory Subsystem of the AMD Opteron Processor
作者： Pat Conway , Nathan Kalyanasundharam , Gregg Donley , Kevin Lepak , Bill Hughes
DOI: 10.1109/MM.2010.31
关键词:
摘要: The 12-core AMD Opteron processor, code-named" Magny Cours," combines advances in silicon, packaging, interconnect, cache coherence protocol, and server architecture to …
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ieeecomputersociety.org参考文章(7)
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