A 4 μs integration time imager based on CMOS single photon avalanche diode technology

摘要: Abstract An optical imager is reported based on single photon avalanche diodes. The imager, fabricated in 0.8 μm CMOS technology, consists of an array 1024 pixels each with area 58 μm × 58 μm for a total chip 2.5 mm × 2.8 mm. architecture the reduced to minimum since no A/D converter required. Moreover, output pixel digital, complex read-out circuitry, amplifiers, sample and hold, other analog processing circuits are also not necessary. maximum measured dynamic range 120 dB noise equivalent intensity 1.3 mlx. integration time per 4 μs while electrical crosstalk negligible without need any post-processing or non-standard techniques.