High aspect ratio plasma etch for 3D NAND semiconductor applications

作者: Gene Lee , Byungkook Kong , Liming Yang

DOI:

关键词:

摘要: Embodiments of the present disclosure provide methods for forming features in a film stack that may be utilized to form stair-like structures with accurate profiles control manufacturing three dimensional (3D) stacking semiconductor chips. In one example, method etching material layer disposed on substrate using synchronized RF pulses includes providing an gas mixture into processing chamber having substrate, synchronously pulsing source power and bias at ratio less than 0.5, substrate.

参考文章(9)
Yeonghun Han, Gyungjin Min, Chulho Shin, Han Geun Yu, Sukho Joo, Ha-Na Kim, Methods Of Manufacturing Stair-Type Structures And Methods Of Manufacturing Nonvolatile Memory Devices Using The Same ,(2011)
Qian Fu, Hyun-Yong Yu, Method for forming stair-step structures ,(2011)
Zvi Or-Bach, Brian Cronquist, Deepak C. Sekar, Novel semiconductor device and structure ,(2012)
Doug Yong Sung, Andrey Ushakov, Vladimir Volynets, Min Joon Park, Han Soo Shin, Plasma processing apparatus and method thereof ,(2009)
Yashaswini Pattar, Kartik Ramaswamy, Phillip Stout, Sergio Fukuda Shoji, Katsumasa Kawasaki, Shahid Rauf, Ankur Agarwal, Bryan Liao, Duy D. Nguyen, Synchronized radio frequency pulsing for plasma etching ,(2010)
Yang Kuo Wei, Shih Hui Shen, Mao Chih Jen, Chuang Chun Han, Method of manufacturing semiconductor device ,(2011)