Ferroelectric capacitor and method for forming local interconnect

摘要: Problems arise when connecting the bottom plate of a ferroelectric capacitor to source its associated access transistor during fabrication an ultra large scale integrated memory circuit. The temperature and ambient certain steps process adversely affects ohmic properties connection. To overcome these problems, insulative layer is formed between transistor. separates from electrode, subsequent high swings remainder do not produce any direct connection plate. After circuits have been fabricated on semiconductor wafer, voltage applied across layer, preferably wafer probe. magnitude selected breakdown but does damage layer. As result, good contact produced