Trench isolation process
作者： Guy R. Freeman
DOI:
关键词:
摘要: A trench isolation process for bipolar and/or MOS circuits employs with the trenches extending from an region just below surface down to and through a buried layer having same dopant polarity as regions, so that inversion along sidewalls of is prevented.
lens.org 参考文章(13)
James G. Aiken, Benjamin J. Sloan, Selective diffusion and etching method for isolation of integrated logic circuit ,(1977)
Hans B. Pogge, Harsaran S. Bhatia, Narasipur G. Anantha, Santosh P. Caur, Method for making a lateral PNP or NPN with a high gain utilizing reactive ion etching of buried high conductivity regions ,(1979)
George Richard Goth, Self-aligned channel stop ,(1986)
Stanley Wolf, Richard N. Tauber, Silicon Processing for the VLSI Era ,(1986)
Mammen Thomas, Matthew Weinberg, Method of making bipolar and MOS devices on same integrated circuit substrate ,(1987)
Michael R. Poponiak, Hans S. Rupprecht, Robert O. Schwenker, Cheng T. Horng, Process for fabricating a self-aligned micrometer bipolar transistor device ,(1981)
Jiro Ohshima, Shin-ichi Taka, Method of manufacturing bipolar transistor with self-aligned external base and emitter regions ,(1988)
Mammen Thomas, Matthew Weinberg, Method of making a planar MOS device in polysilicon ,(1985)
Leo R. Piotrowski, Fabrication of complementary bipolar transistors and CMOS devices with poly gates ,(1980)
George R. Goth, Shashi D. Malaviya, Method of making trench-incorporated monolithic semiconductor capacitor and high density dynamic memory cells including the capacitor ,(1985)