作者: Matthias Locher
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摘要: In a frequency synthesizer with phase locked loop charge pump (2) is present an idle path (5-C, 6-C, 7, 8). The 8) activated only shortly before up or down pulse appears at output (15, 16) of detector (1) and the disabled after disappearance signal. Means (20) to generate signal for controlling enablement disablement may comprise down-counter divider (30) zipper (35).