作者: Govind Prasad , Bipin Chandra Mandi , Maifuz Ali
DOI: 10.1007/S10470-020-01786-8
关键词:
摘要: In aerospace applications, the conventional Static Random Access Memories (SRAMs) are facing high soft error problems like a single event upset. Several radiation-hardened based design (RHBD) twelve-transistor (12T) Dice, 12T We-Quatro SRAM cells, etc., had been developed to address problems. But they all consuming comparatively more total and static power with delay area. The 10T cell reduce dissipation area overhead. analysis of shows write failure at high-frequency. An RHBD has proposed in this paper. consumes less total, compared Dice cell, respectively. critical charge hold noise margin have improved cell. simulated result that provided comparable area, speed, good writability under process variations. Finally, Monte Carlo Simulation cells 45 nm CMOS technology validates efficiency