Interrupt control apparatus and method separately holding respective operation information of a processor preceding a normal or a break interrupt
作者： Atsuhiro Suga , Yasuki Nakamura , Hideo Miyake
DOI:
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摘要: When a normal interrupt occurs, data of processor operation before the are held in return address register (452), previous state (453), and factor (454). break-interrupt is another break (455). Hence, can occur even within an inhibition period by interrupt. Besides, when set flag (456). By referring to (456) executing instruction, or accurately be restored.
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