Method and apparatus for switching clocks presented to synchronous SRAMs
作者： Stephen M. Johnson , Michael R. Hede , Jeffrey M. Rogers
DOI:
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摘要: A method and apparatus for switching clocks comprising a first circuit, second third circuit. The circuit may be configured to generate (i) signal in response select clock signal, (ii) said (iii) (iv) fourth signal. enable one or more input signals, predetermined logic level as output signals
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