Asynchronous clock switching between first and second clocks by extending phase of current clock and switching after a predetermined time and appropriated transitions
作者： Sebastian T. Ventrone , Timothy J. VonReyn
DOI:
关键词: CPU multiplier 、 Computer science 、 Clock drift 、 Master clock 、 Clock domain crossing 、 Synchronous circuit 、 Computer hardware 、 Clock gating 、 Digital clock manager 、 Clock generator
摘要: A microprocessor having two on-board clock generators. The faster generator controls the during normal, synchronous mode. slower when bus must be accessed, or "snoop" mode which is invoked another entry signals intent to use bus. entity
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