Design and analysis of 8 bit fully segmented digital to analog converter
作者： Arpit Kumar Baranwal , Anurag , Balwinder Singh
DOI: 10.1109/RAECS.2015.7453307
关键词:
摘要: This paper presents design of an 8-bit 1.8V fully segmented digital to analog converter (DAC) using 180nm CMOS technology. DAC is essential part signal processor. Digital employed in processing signals and providing output the form current or voltage for corresponding binary input. The differential non linearity a shows variation 1LSB change at input that accuracy data conversion. To achieve low more accurate conversion designed with unary coding steering technique. INL DNL achieved this research work are 0.145LSB 0.013LSB respectively. power consumption simulated as 99.67mW.
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