Design and validation of an artificial neural network based on analog circuits
作者： Fikret Başar Gencer , Xhesila Xhafa , Benan Beril İnam , Mustafa Berke Yelten
DOI: 10.1007/S10470-020-01713-X
关键词:
摘要: This paper focuses on the design and validation of an analog artificial neural network. Basic building blocks ANN have been constructed in UMC 90 nm device technology. Performance metrics demonstrated through circuit simulations. The weights estimated automated back-propagation algorithm, which is running simulations during weight optimization. Two case studies, operation XOR logic gate a full adder captured using proposed ANN. Monte Carlo analysis reveals that operates with accuracy 99.85%.
springer.com
sci-hub.st 参考文章(26)
Simon S. Haykin, Neural Networks And Learning Machines ,(2010)
Mustafa Berke Yelten, Paul D. Franzon, Michael B. Steer, Comparison of modeling techniques in circuit variability analysis International Journal of Numerical Modelling-electronic Networks Devices and Fields. ,vol. 25, pp. 288- 302 ,(2012) , 10.1002/JNM.836
Melin Ngwar, Jim Wight, A fully integrated analog neuron for dynamic multi-layer perceptron networks international joint conference on neural network. pp. 1- 8 ,(2015) , 10.1109/IJCNN.2015.7280448
A.K. Jain, Jianchang Mao, K.M. Mohiuddin, Artificial neural networks: a tutorial computational science and engineering. ,vol. 29, pp. 31- 44 ,(1996) , 10.1109/2.485891
Cory Merkel, Dhireesha Kudithipudi, Nick Sereni, Periodic activation functions in memristor-based analog neural networks international joint conference on neural network. pp. 1- 7 ,(2013) , 10.1109/IJCNN.2013.6706772
D.C. Soo, R.G. Meyer, A four-quadrant NMOS analog multiplier IEEE Journal of Solid-state Circuits. ,vol. 17, pp. 1174- 1178 ,(1982) , 10.1109/JSSC.1982.1051877
Zhiming Chen, Yuanjin Zheng, Foo Chung Choong, Minkyu Je, A Low-Power Variable-Gain Amplifier With Improved Linearity: Analysis and Design IEEE Transactions on Circuits and Systems. ,vol. 59, pp. 2176- 2185 ,(2012) , 10.1109/TCSI.2012.2185331
B. C. Akshatha, Vijay Kumar Akshintala, Low Voltage, Low Power, High Linearity, High Speed CMOS Voltage Mode Analog Multiplier international conference on emerging trends in engineering and technology. pp. 149- 154 ,(2009) , 10.1109/ICETET.2009.141
B. Gilbert, A precise four-quadrant multiplier with subnanosecond response IEEE Journal of Solid-state Circuits. ,vol. 3, pp. 365- 373 ,(1968) , 10.1109/JSSC.1968.1049925
P. Zhou, J. Austin, Learning criteria for training neural network classifiers Neural Computing and Applications. ,vol. 7, pp. 334- 342 ,(1998) , 10.1007/BF01428124