作者: Mustafa Berke Yelten , Paul D. Franzon , Michael B. Steer
DOI: 10.1002/JNM.836
关键词:
摘要: Three nonlinear reduced-order modeling approaches are compared in a case study of circuit variability analysis for deep submicron complementary metal-oxide-semiconductor technologies where the electrical characteristics transistor can be significantly detrimental to performance. The drain currents 65 nm N-type and P-type transistors modeled terms few process parameters, terminal voltages, temperature using Kriging-based surrogate models, neural network-based support vector machine-based models. models analyzed with respect their accuracy, establishment time, size, evaluation time. It is shown that generated sufficient accuracy they used analysis. Numerical experiments demonstrate smaller circuits, yields results faster than same whereas larger preferred as, all metrics, better performance obtained. Within-die variations an XOR analyzed, it developed more effectively capture within-die traditional corner Copyright © 2011 John Wiley & Sons, Ltd.