A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS
作者： Viki Szortyka , Qixian Shi , Kuba Raczkowski , Bertrand Parvais , Maarten Kuijk
DOI: 10.1109/JSSC.2015.2442998
关键词:
摘要: … In Section II we discuss the placement of the sub-sampling phase detector (SSPD) in a millimeter-wave PLL. In Section III the design of the QVCO is described. In Section IV the design …
harvard.edu
sci-hub.se 参考文章(33)
Maryam Tabesh, Jiashu Chen, Cristian Marcu, Lingkai Kong, Shinwon Kang, Ali M. Niknejad, Elad Alon, A 65 nm CMOS 4-Element Sub-34 mW/Element 60 GHz Phased-Array Transceiver IEEE Journal of Solid-state Circuits. ,vol. 46, pp. 3018- 3032 ,(2011) , 10.1109/JSSC.2011.2166030
Kenichi Okada, Keitarou Kondou, Masaya Miyahara, Masashi Shinagawa, Hiroki Asada, Ryo Minami, Tatsuya Yamaguchi, Ahmed Musa, Yuuki Tsukui, Yasuo Asakura, Shinya Tamonoki, Hiroyuki Yamagishi, Yasufumi Hino, Takahiro Sato, Hironori Sakaguchi, Naoki Shimasaki, Toshihiko Ito, Yasuaki Takeuchi, Ning Li, Qinghong Bu, Rui Murakami, Keigo Bunsen, Kota Matsushita, Makoto Noda, Akira Matsuzawa, Full Four-Channel 6.3-Gb/s 60-GHz CMOS Transceiver With Low-Power Analog and Digital Baseband Circuitry IEEE Journal of Solid-state Circuits. ,vol. 48, pp. 46- 65 ,(2013) , 10.1109/JSSC.2012.2218066
P. Andreani, Xiaoyan Wang, On the phase-noise and phase-error performances of multiphase LC CMOS VCOs IEEE Journal of Solid-state Circuits. ,vol. 39, pp. 1883- 1893 ,(2004) , 10.1109/JSSC.2004.835828
Po-Chun Huang, Wei-Sung Chang, Tai-Cheng Lee, 21.2 A 2.3GHz fractional-N dividerless phase-locked loop with −112dBc/Hz in-band phase noise international solid-state circuits conference. pp. 362- 363 ,(2014) , 10.1109/ISSCC.2014.6757470
Liang Wu, Howard C. Luong, A 49-to-62GHz CMOS quadrature VCO with bimodal enhanced magnetic tuning 2012 Proceedings of the ESSCIRC (ESSCIRC). pp. 297- 300 ,(2012) , 10.1109/ESSCIRC.2012.6341313
Wanghua Wu, Robert Bogdan Staszewski, John R. Long, A 56.4-to-63.4 GHz Multi-Rate All-Digital Fractional-N PLL for FMCW Radar Applications in 65 nm CMOS IEEE Journal of Solid-state Circuits. ,vol. 49, pp. 1081- 1096 ,(2014) , 10.1109/JSSC.2014.2301764
Andrea Bevilacqua, Pietro Andreani, An Analysis of $1/f$ Noise to Phase Noise Conversion in CMOS Harmonic Oscillators IEEE Transactions on Circuits and Systems I-regular Papers. ,vol. 59, pp. 938- 945 ,(2012) , 10.1109/TCSI.2012.2190564
V. Vidojkovic, V. Szortyka, K. Khalaf, G. Mangraviti, S. Brebels, W. van Thillo, K. Vaesen, B. Parvais, V. Issakov, M. Libois, M. Matsuo, J. Long, C. Soens, P. Wambacq, A low-power radio chipset in 40nm LP CMOS with beamforming for 60GHz high-data-rate wireless communication international solid-state circuits conference. pp. 236- 237 ,(2013) , 10.1109/ISSCC.2013.6487715
Qixian Shi, Kristof Vaesen, Bertrand Parvais, Giovanni Mangraviti, Piet Wambacq, A 54–69.3 GHz dual-band VCO with differential hybrid coupler for quadrature generation asian solid state circuits conference. pp. 325- 328 ,(2013) , 10.1109/ASSCC.2013.6691048
Wanghua Wu, John R. Long, Robert Bogdan Staszewski, High-Resolution Millimeter-Wave Digitally Controlled Oscillators With Reconfigurable Passive Resonators IEEE Journal of Solid-state Circuits. ,vol. 48, pp. 2785- 2794 ,(2013) , 10.1109/JSSC.2013.2282701