High density integrated circuit packaging with chip stacking and via interconnections

摘要: Chip stacks with decreased conductor length and improved noise immunity are formed by laser drilling of individual chips, such as memory preferably near but within the periphery thereof, forming conductors therethrough, metallization or filling conductive paste which may be stabilized transient liquid phase (TLP) processes during pads, possibly including connector patterns on both sides at least some chips in stack. At stack then have electrical mechanical connections made therebetween, electroplated solder preforms consistent TLP processes. The contained a layer resilient material surrounding in-situ. High density circuit packages thus obtained mounted carrier surface mount techniques separable connectors plug socket arrangement. same chip to match coefficients thermal expansion. High-density also form removable modules generally planar prism shaped similar pen conduction module.