A low level analysis of Cellular Automata and Random Boolean Networks as a computational architecture

摘要: With the transition from single-core to multi-core computing and CMOS technology reaching its physical limits, new architectures which are scalable, robust, low-power required. A promising alternative conventional Cellular Automata (CA) networks Random Boolean Networks (RBN), where simple computational nodes combine form a network that is capable of performing larger task. It has previously been shown RBNs can offer superior characteristics over mesh in terms robustness, information processing capabilities, manufacturing costs while locally connected elements CA provide better scalability low average interconnect length. This study presents level hardware analysis these using framework generates HDL code netlist for various parameters. The netlists then used simulate estimate latency, area power consumed when implemented on silicon pre-determined computation. We show RBNs, faster compared network, but found have lower distribution dissipation than because their regular structure. well-established task determine latency operation presented good understanding effect non-local connections network. Programming this purpose done externally novel self-configuration algorithm requiring minimal hardware. Configuration by sending configuration packets through randomly chosen node. Logic identifying i topology RBN enable compilers analyze generate bit stream On other hand, passing data inputs one sides cell array shifting it into overhead identification mechanisms presented. An small-world propagation capability networks, whose randomness lies between completely irregular realistic providing capability. provides valuable help designers make decisions performance parameters both thus find best design application under consideration.