Eeprom array with flash-like core
作者： Emil Lambrache , George Smarandoiu
DOI:
关键词:
摘要: A sector programmable EEPROM memory capable of emulating the byte functionality full-featured EEPROMs. The incorporates an on-chip write cache (83) used as a buffer between level data entered by user system and word written to main core. core is divided into pages (32) with each page further sub-page sectors (59-62), holding multitude multi-byte words. within can be individually or collectively subjected program erase cycle. ECC unit (73) recover refresh lost in also interruptible load cycles.
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