Apparatus for and method of noise suppression and dithering to improve resolution quality in a digital RF processor

摘要: A novel apparatus for and a method of noise spurious tones suppression in digital RF processor (DRP). The invention is well suited use highly integrated system on chip (SoC) radio solutions that incorporate very large amount logic circuitry. scheme eliminates the caused by various interference sources transmitted through electromagnetic, power, ground substrate paths. permits an all PLL (ADPLL) to operate such way avoid generating spurs would normally be generated from injection pulling effect interfering chip. frequency reference clock retimed synchronous oscillator used drive entire circuitry DRP. This ensures different edges throughout will not exhibit mutual drift. improving resolution quality time converter within ADPLL also taught. dithers passing it delay circuit controlled sigma-delta modulator. dithered reduces affect phase at output due ill-behaved quantization TDC timing estimation.