Design of a 5-bit 2Gsps CMOS D/A converter for DS-CDMA UWB transceivers
作者： Karim El khadiri , Hassan Qjidaa
DOI: 10.1109/ICMCS.2012.6320140
关键词:
摘要: This paper presents a design of 5-bit 2Gsamples/s digital-to-analog converter (DAC) in 90-nm CMOS technology for DS-CDMA UWB transceivers applications. The proposed DAC was designed with current binary weighted architecture high frequency sampling rate. For low glitches, optimized deglitch circuit is adopted the selection sources. measured integral nonlinearity (INL) ±0.002LSB and differential (DNL) ± 0.015LSB. implemented shows spurious free dynamic range (SFDR) 30dB at Fsignal 500Mhz. layout occupies small active area 62.415um × 38.64um 90nm, consumes only 38.4 mW power.
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